Regards
Aniqa Malik
The Coward dies a thousand deaths,
the Valiant, only once!
On Thu, Nov 17, 2011 at 4:53 PM, Misbah Yousuf <mc080404066@vu.edu.pk> wrote:
74HC163 has two enable input pins which are _______ and _________
► ENP, ENT
► ENI, ENC
► ENP, ENC
► ENT, ENI
The 74HC163 is a 4-bit Synchronous Counter. Figure 28.2. The counter has the following pins.
- Parallel data inputs D0, D1, D2 and D3
- Data outputs Q0, Q1, Q2 and Q3
- Positive edge-triggered CLOCK signal
- Active-low CLR input which resets the Counter output to 0000
- Active-low LOAD input which loads the 4-bit data applied at the counter inputs
- Active-high ENT and ENP enable inputs. For the counter to operate both the enable inputs have to be high.
http://free-books-online.org/computers/digital-logic-design/timing-diagram-of-a-synchronous-decade-counter/--On Thu, Nov 17, 2011 at 11:06 PM, ^*^Aniqa Malik^*^ <shinestar.star86@gmail.com> wrote:
74HC163 has two enable input pins which are _______ and _________
► ENP, ENT
► ENI, ENC
► ENP, ENC
► ENT, ENI
--RegardsThe Coward dies a thousand deaths,the Valiant, only once!
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Regards,Misbah Yousuf
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